Multi-chip packaged modules are well known in the art. In a multi-chip packaged module, a plurality of integrated circuit dies are placed on a surface of a die attach pad, which is surrounded by leads. Each die has a plurality of bonding pads. Electrical leads, such as wire bonds, connect certain bonding pads of the dies to certain leads, surrounding the die attach pad. In the prior art, if two dies are to be packaged side by side, and if an electrical connection is desired to connect the bonding pad of a first die, which is located to one side of a second die, to a lead which is on the other side of the second die, the bonding wire has to cross over the second die. This can lead to several problems. First, the wire bond must be lengthy. Second, by crossing the wire bond over the second die, the wire bond may interfere electrically with the operation of the circuit elements on the second die. Finally, if not done carefully, the wire bond may even short to other electrical terminals (including other wire bonds) over the second die. Further, in some cases, due to the presence of the adjacent die, it may not even be possible to cross the wire bond over the adjacent die.
A further problem with the prior art is if one of the dies contains a vertically oriented circuit element, such as a bipolar transistor or a vertical DMOS transistor. In that event, the bottom surface of that die is a terminal, and must be connected to a voltage other than ground. Thus, the dies cannot be connected on the same die attach pad (which is typically made of a metal), due to the potential differences between the bottom surfaces of the dies.
One prior art solution is to use multiple die attach pads, with each die attach pad for a different die, and the multiple die attach pads are then packaged in a single package. Another prior art solution is to create a re-distribution layer (RDL) with the bonding pads of the different dies connected to the RDL, and the RDL re-muting the signals to different circuit elements. Finally, another prior art solution is to connect the dies on a printed circuit board (PCB) with the PCB packaged in a die attach pad. Clearly all of these prior art solutions are expensive.
In the prior art, it is also well known to use oxide filled trenches to isolate circuit elements. In addition, through substrate vias (TSV) filled with metal have also been used to route signals from the back side of a die to the front side. Finally, junction diffusion isolation has been used to isolate circuit elements on the same die from one another.
Therefore, one object of the present invention is to reduce the cost of multi-chip packaging, and in particular to reduce the cost for a multi-chip packaging of multiple dies, where one of the dies contains a vertical circuit element.